AMD Posts GCC Compiler Patches For AVX10V1AUX ISA Support
AMD Posts GCC Compiler Patches For AVX10V1AUX ISA Support Written by Michael Larabel in GNU on 24 September 2026 at 12:12 PM EDT. Add A Comment Following their recent AVX10_V2_AUX support for GCC as part of the bring-up for the AI Compute Extensions "ACE" in GCC 17, AMD compiler engineers this week posted the initial patches for enabling the AVX10V1AUX ISA support. AVX10V1AUX is the auxiliary updates for AVX10.1 also as part of the ACE initiative.
- ▪AMD Posts GCC Compiler Patches For AVX10V1AUX ISA Support Written by Michael Larabel in GNU on 24 September 2026 at 12:12 PM EDT.
- ▪Add A Comment Following their recent AVX10_V2_AUX support for GCC as part of the bring-up for the AI Compute Extensions "ACE" in GCC 17, AMD compiler engineers this week posted the initial patches for enabling the AVX10V1AUX ISA support.
- ▪AVX10V1AUX is the auxiliary updates for AVX10.1 also as part of the ACE initiative.
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| Original publisher | Phoronix |
| Canonical URL | https://www.phoronix.com/news/GCC-Patches-AVX10V1AUX |
| Publication time | Thu, 24 Sep 2026 12:12:57 -0400 |
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AMD Posts GCC Compiler Patches For AVX10V1AUX ISA Support Written by Michael Larabel in GNU on 24 September 2026 at 12:12 PM EDT. Add A Comment Following their recent AVX10_V2_AUX support for GCC as part of the bring-up for the AI Compute Extensions "ACE" in GCC 17, AMD compiler engineers this week posted the initial patches for enabling the AVX10V1AUX ISA support. AVX10V1AUX is the auxiliary updates for AVX10.1 also as part of the ACE initiative. AVX10V1AUX isn't as in-depth as AVX10_V2_AUX with the compressed AI data format types but does carry some transitionary instructions that map onto the AVX10.2 structure.
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