Can you reverse engineer an ASIC?
Earlier this year we published a puzzle that handed you a complete neural network and asked you to figure out what it did. The response was great, so we’ve made another one! This time, we’re going much deeper down the tech stack.
- ▪Earlier this year we published a puzzle that handed you a complete neural network and asked you to figure out what it did.
- ▪The response was great, so we’ve made another one!
- ▪This time, we’re going much deeper down the tech stack.
Hacker News (Front Page) files mainly under programming. We currently carry 1,210 of its stories. Top-voted stories on Hacker News.
Story provenance
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Story provenance
Attribution is not the same as permission. This drawer separates discovery metadata, excerpts, WeSearch-generated summaries, reuse status, and whether the publisher receives the visit. Nothing here claims a legal grant the publisher has not made.
Record
| Original publisher | Jane Street Blog |
| Canonical URL | https://blog.janestreet.com/can-you-reverse-engineer-an-asic/ |
| Publication time | Thu, 06 Aug 2026 19:07:33 +0000 |
| Retrieval time | 2026-08-06T21:05:42.634Z |
| Last seen | 2026-08-06T21:05:42.634Z |
| Headline source | Publisher (no WeSearch rewrite) |
| Excerpt source | publisher body |
| Excerpt method | First ~120 words (~800 chars) of extracted publisher body, fair-use limited. |
| Summary | WeSearch · cerebras-chat (WeSearch summarizer) |
| Summary source text | contentText |
| Citation coverage | Summary is a WeSearch-generated derivative; primary citation is the original publisher URL. |
| Cluster | RjvrxkPt_tdi · 1 stories |
| Cluster logic | Grouped by semantic title/content similarity across sources within a rolling window. Same-publisher template collisions are excluded from coverage comparison. |
| Ranking reason | Story pages are not engagement-ranked. Hub feeds use recency, with optional source-diversified chronological ordering (cap consecutive stories per source). No personalized ranking. |
| Publisher visit | Yes — open original |
| Substitutes article? | No — link-out required for full text |
Rights status (four layers)
WeSearch handling by dimension
| Indexing | May the item be indexed (stored, ranked, made findable)? | Allowed |
| Snippet | May a short excerpt of the publisher's text be shown? | Allowed |
| AI summary | May WeSearch generate its own short summary of the article? | Limited |
| Retrieval / RAG | May the content be exposed for third-party retrieval-augmented generation? | Not asserted |
| Model training | May the content be used to train AI models? | Not asserted |
| Commercial reuse | May the content be reused commercially? | Not permitted |
Basis: Derived from the published RSS/Atom feed. Contact: [email protected]. Reviewed: 2026-07-24.
Opening excerpt (first ~120 words) tap to expand
Earlier this year we published a puzzle that handed you a complete neural network and asked you to figure out what it did. The response was great, so we’ve made another one! This time, we’re going much deeper down the tech stack. For this puzzle we’ve designed a chip, but we’re only giving you the layout. A crash course in how chips get made Modern chips start life as code. A hardware designer describes a circuit in a hardware description language like Verilog, which gets synthesized into a netlist of logic gates—NANDs, NORs, XORs, flip-flops. Then electronic design automation tools place and route those gates: they pick a physical location for every gate on the die and draw the metal wires that connect them, across many stacked routing layers connected by vias.
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Excerpt limited to ~120 words for fair-use compliance. The full article is at Jane Street Blog.
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