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Show HN: A Project Oberon System version running on RISC-V instead of RISC-5

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Show HN: A Project Oberon System version running on RISC-V instead of RISC-5
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Wirth continued this journey after his retirement. The sources published on projectoberon.net are written in Oberon-07, which is Wirth's last and most radical simplification of the language. There is also a free 2013 revision of the Project Oberon book available.

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Original publisherGitHub
Canonical URLhttps://github.com/rochus-keller/OberonSystem/tree/op2-rv32
Publication timeSun, 09 Aug 2026 12:43:16 +0000
Retrieval time2026-08-09T14:10:41.916Z
Last seen2026-08-09T14:10:41.916Z
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Basis: Derived from the published RSS/Atom feed. Contact: [email protected]. Reviewed: 2026-07-24.

Opening excerpt (first ~120 words) tap to expand

This is a version of the Project Oberon System migrated from Oberon 07 to the more common Oberon 90, using a recent version of the OP2 compiler with a RISC-V (RV32) backend; the repository also includes an emulation of a machine (VM) very similar to the one described by Wirth in his Project Oberon Book, based on the well-known RV32 emulator; the latter is a stripped-down and slightly modified version with only the interpreter, combined with my own implementation of the machine and the peripherals; the memory map of Wirth's machine is reproduced 1:1 so that Kernel.Mod, Display.Mod and Input.Mod are unchanged.

Excerpt limited to ~120 words for fair-use compliance. The full article is at GitHub.

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