What are all those pins for? (2009)
The article discusses the design and functionality of the Intel Core i7 920 CPU, which features a total of 1366 pins. It explains the division of these pins into categories such as power, memory data, and reserved signals, highlighting the need for a large number of power pins due to high current requirements. The author speculates on the design choices behind the pin layout and the implications for motherboard design.
- ▪The Intel Core i7 920 CPU has 1366 pins, more than any previous CPU.
- ▪The pins are divided into sections for power, memory data, and reserved signals.
- ▪The CPU can use up to 145A of current, necessitating a spread-out design for power connections.
Hacker News (Newest) files mainly under programming. We currently carry 5,306 of its stories.
Story provenance
Source · retrieval · rights · ranking — open for full record
inspect →
Story provenance
Attribution is not the same as permission. This drawer separates discovery metadata, excerpts, WeSearch-generated summaries, reuse status, and whether the publisher receives the visit. Nothing here claims a legal grant the publisher has not made.
Record
| Original publisher | Reenigne |
| Canonical URL | https://www.reenigne.org/blog/what-are-all-those-pins-for/ |
| Publication time | Mon, 25 May 2026 19:23:34 +0000 |
| Retrieval time | 2026-05-25T19:37:40.493Z |
| Last seen | 2026-05-25T19:37:40.493Z |
| Headline source | Publisher (no WeSearch rewrite) |
| Excerpt source | publisher body |
| Excerpt method | First ~120 words (~800 chars) of extracted publisher body, fair-use limited. |
| Summary | WeSearch · cerebras-chat (WeSearch summarizer) |
| Summary source text | contentText |
| Citation coverage | Summary is a WeSearch-generated derivative; primary citation is the original publisher URL. |
| Cluster | None |
| Cluster logic | Not yet clustered, or no peer story found in the clustering window. |
| Ranking reason | Story pages are not engagement-ranked. Hub feeds use recency, with optional source-diversified chronological ordering (cap consecutive stories per source). No personalized ranking. |
| Publisher visit | Yes — open original |
| Substitutes article? | No — link-out required for full text |
Rights status (four layers)
WeSearch handling by dimension
| Indexing | May the item be indexed (stored, ranked, made findable)? | Allowed |
| Snippet | May a short excerpt of the publisher's text be shown? | Allowed |
| AI summary | May WeSearch generate its own short summary of the article? | Limited |
| Retrieval / RAG | May the content be exposed for third-party retrieval-augmented generation? | Not asserted |
| Model training | May the content be used to train AI models? | Not asserted |
| Commercial reuse | May the content be reused commercially? | Not permitted |
Basis: Derived from the published RSS/Atom feed. Contact: [email protected]. Reviewed: 2026-07-24.
Opening excerpt (first ~120 words) tap to expand
I recently built myself a new computer using an Intel Core i7 920 CPU. This CPU has more pins (well, "lands" actually, since they are just flat conducting areas that touch pins in the socket) than any other yet produced, 1366 of them to be precise. I was wondering why so many were needed, so I grabbed the datasheet and made a map: Power: VSS VCC VCCPLL VTTA VTTD VDDQ Memory: DDR0 data other DDR1 data other DDR2 data other Other: QPI data other Other reserved Idle speculation follows (I don't have any background in CPU or motherboard design): The pins roughly divide into six sections: two for memory data, one for other memory-related signals, one for power, one for the QPI bus and one that is mostly reserved.
…
Excerpt limited to ~120 words for fair-use compliance. The full article is at Reenigne.
Discussion
0 commentsMore from Reenigne
