Mesa 26.3 Intel Driver Code Enables Large GRF Mode For Newer GPUs
Mesa 26.3-devel has added Large GRF mode support for newer Intel GPUs, including Alchemist/DG2, Battlemage/Xe2, and Xe3 via VRT. The Large GRF mode doubles the register space per hardware thread from 128 to 256 registers, helping to reduce register spilling. This functionality, previously available only in the Intel Compute Runtime, is now integrated into the open-source Mesa driver.
- ▪The Mesa 26.3-devel branch now enables Large GRF mode for Alchemist/DG2 and Battlemage/Xe2 graphics architectures.
- ▪Xe3 GPUs gain access to 256 GRF registers through the new Variable Register Thread (VRT) feature.
- ▪Large GRF mode expands the register file per thread, cutting down on register spilling and improving performance.
- ▪The update mirrors capabilities already present in Intel's IGC and Compute Runtime, bringing them to the Mesa driver ecosystem.
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| Canonical URL | https://www.phoronix.com/news/Intel-Large-GRF-Mode-Mesa-26.3 |
| Publication time | Sun, 09 Aug 2026 08:24:53 -0400 |
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Mesa 26.3 Intel Driver Code Enables Large GRF Mode For Newer GPUs Written by Michael Larabel in Intel on 9 August 2026 at 08:24 AM EDT. Add A Comment The Intel graphics compiler code in Mesa 26.3-devel has now enabled the Large GRF mode for Alchemist/DG2 and Battlemage/Xe2 graphics and VRT for Xe3 graphics. The Large General Register File (GRF) mode on Intel graphics doubles the register space for a single hardware thread from 128 to 256 GRF registers. The Large GRF mode helps in reducing register spilling. More details on the Intel Large GRF support can be found via this Intel.com documentation. This merge hitting Mesa 26.3-devel Git this weekend enables the large GRF mode for DG2 through Xe2 graphics. Large GRF was already enabled for the IGC / Intel Compute Runtime.
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